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Figure 25.3. ADC Analog Power Consumption With Different WARMUPMODE Settings
Bandgap reference warm -up
ADC warm -up
ADC conversion
a)
ADC enabled
Power
Power
Conversion trigger
5 μs
1 μs
Conversion trigger
1 μs
N ORM AL
Tim e
KEEPSCAN REFW ARM
b)
5 μs
( w SCAN REF = in t e r n a l ba n dga p)
Tim e
Power
KEEPADCW ARM
c)
d)
Power
5 μs
( w SCAN REF = in t e r n a l ba n dga p)
FASTBG
( w SCAN REF = a n y)
or
N ORM AL
( w SCAN REF = e xt e r n a l or V DD)
Tim e
25.3.4 Input Selection
The ADC is connected to 8 external input pins, which can be selected as 8 different single ended inputs or
4 differential inputs. In addition, 6 single ended internal inputs can be selected. The available selections
are given in the register description for ADCn_SINGLECTRL and ADCn_SCANCTRL.
For offset calibration purposes it is possible to internally short the differential ADC inputs and thereby
measure a 0 V differential. Differential 0 V is selected by writing the DIFF bit to 1 and INPUTSEL to 4 in
ADCn_SINGLECTRL. Calibration is described in detail in Section 25.3.10 (p. 350) .
Note
When VDD/3 is sampled, the acquisition time should be above a lower limit. The reader is
referred to the datasheet for minimum VDD/3 acquisition time.
25.3.4.1 Input Filtering
The selected input signal can be filtered, either through an internal low pass RC filter or an internal
decoupling capacitor. The different filter configurations can be enabled through the LPFMODE bits in
ADCn_CTRL.
The RC input filter configuration is given in Figure 25.4 (p. 345) . The resistance and capacitance values
are given in the electrical characteristics for the device, named R ADCFILT and C ADCFILT respectively.
Figure 25.4. ADC RC Input Filter Configuration
Input
R
C
ADC
2011-04-12 - d0001_Rev1.10
345
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